GMSL2 cameras on a custom carrier board: what's different

A custom carrier board adds new failure modes to GMSL2 camera bring-up that do not exist on development kits. Power sequencing, PCB impedance, and I2C address conflicts between multiple serializer instances all show up differently on custom hardware. This post covers what changes when you move from a devkit to your own board.

Key Insights

• The devkit GMSL2 DTS is a reference, not a starting point — every GPIO, I2C bus, and NVCSI port number needs verification against your schematic
• The three most common differences between devkit and custom board: I2C bus number, NVCSI port routing, and PWDNB/ERRB GPIO assignments
• Orin NX and AGX Orin have different NVCSI port counts and different SoM pin-to-CSI lane mappings — a DTS that works on one will not work on the other without modification
• Power sequencing differences are the least visible but cause intermittent failures that look like driver bugs
• Work through the hardware mapping before touching the DTS — wrong hardware assumptions produce fixes that work once and fail randomly

What actually changes on a custom carrier board

When NVIDIA’s reference GMSL2 setup works on the devkit and fails on a custom carrier board, the failure is almost always in one of four areas. None of them are driver bugs — they are hardware mapping differences between the devkit and your board.

I2C bus number. The MAX9296A deserializer connects to one of the Jetson’s I2C controllers. The devkit may use I2C3; your board may use I2C1 or I2C6. The DTS parent node for the MAX9296A must match the correct controller.

NVCSI port routing. The MIPI D-PHY lanes from the MAX9296A connect to specific SoM pins. Those pins belong to a specific NVCSI port. The DTS must declare the correct port number. Wrong port: zero frames, no error message.

GPIO pin assignments. PWDNB (power-down bar), ERRB (error bar), and camera power enable GPIOs all land on different GPIO pins on custom boards. The DTS GPIO references must match your schematic.

Power sequencing. The devkit powers camera regulators through its PMIC with a specific sequence. Custom boards may power the same rails through a different path or without the same sequencing guarantees.

Building your hardware mapping before touching the DTS

Before writing a single line of DTS, build this hardware map from your schematic:

MAX9296A VDD      → from which regulator/rail on carrier board?
MAX9296A VDDIO    → same question
MAX9296A PWDNB    → which Jetson SoM GPIO pin?
MAX9296A ERRB     → which Jetson SoM GPIO pin?
MAX9296A I2C SDA  → which SoM connector pin? → which I2C controller?
MAX9296A I2C SCL  → same
MAX9296A MIPI_A D0+/D0- → which SoM connector pins? → which NVCSI port/lane?
MAX9296A MIPI_A D1+/D1- → same
MAX9296A MIPI_A CLK+/CLK- → same

Once you have this mapping, the DTS changes are mechanical — substitute the correct bus number, pin number, and port number into the devkit DTS template.

Adapting the devkit DTS

The key substitutions:

/* DEVKIT — uses I2C3 on i2c@3180000 */
&i2c3 {
    max9296@48 {
        reset-gpios = <&tegra_main_gpio TEGRA234_MAIN_GPIO(H, 3) GPIO_ACTIVE_LOW>;
        /* ... */
    };
};

/* YOUR CUSTOM BOARD — uses I2C1 on i2c@3160000, different GPIO */
&i2c1 {
    max9296@48 {
        reset-gpios = <&tegra_main_gpio TEGRA234_MAIN_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
        /* ... */
    };
};

For the NVCSI port:

/* DEVKIT — NVCSI port 0 */
nvcsi_in0: endpoint@0 {
    remote-endpoint = <&max9296_csi_out0>;
    data-lanes = <0 1 2 3>;
};

/* YOUR CUSTOM BOARD — NVCSI port 2 (if MIPI lanes route there) */
nvcsi_in2: endpoint@2 {
    remote-endpoint = <&max9296_csi_out0>;
    data-lanes = <0 1 2 3>;
};

The NVCSI port number determines where csi-port is set in the tegra-camera-platform module entry. Both the NVCSI binding and the module entry must use the same port number.

Orin NX vs AGX Orin differences

If you are porting a GMSL2 setup from AGX Orin to Orin NX, these specific differences matter:

Property	AGX Orin	Orin NX
NVCSI ports	6	4
Maximum MIPI lanes	12	8
Camera I2C controllers	I2C3, I2C6, I2C8	I2C1, I2C3 (fewer)
SoM connector CSI pin mapping	Different	Different

An AGX Orin DTS that uses NVCSI port 4 or 5 will not work on Orin NX (which only has ports 0–3). The camera I2C bus that was I2C8 on AGX Orin may be on I2C3 on Orin NX. Both need to be re-mapped.

For debugging GMSL2 failures after DTS adaptation, see GMSL2 camera not working on Jetson: 5 failure modes. For the complete devkit bring-up sequence to verify your DTS before customizing, see GMSL2 camera bring-up on Jetson Orin: MAX9295/MAX9296 setup.

The Jetson Orin NX module datasheet with connector pin assignments is available on the NVIDIA Jetson download center. The Orin TRM with NVCSI port-to-pin mapping is in the same location under Tegra234 Technical Reference Manual.

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